//==========================================================================
// Copyright (c) 2000-2008,  Elastos, Inc.  All Rights Reserved.
//==========================================================================
#ifndef _PCF50606_H_
#define _PCF50606_H_

//#define _DebugPCF
#define CKEN15_PI2C		(1<<15)

#define ICR_START		(1<<0)
#define ICR_STOP		(1<<1)
#define ICR_ACKNAK		(1<<2)
#define ICR_TB			(1<<3)
#define ICR_SCLE		(1<<5)
#define ICR_IUE			(1<<6)
#define ICR_ALDIE		(1<<12)
#define ICR_MA			(1<<4)
#define ICR_UR			(1<<14)

#define ISR_ITE			(1<<6)
#define ISR_IRF			(1<<7)
#define PCF50606_IIC_AD	 	( 0x10  )

#define PCF50606_ID	 	( 0x00  ) 	/* SIM INTERFACE CONTROL REGISTER */
#define PCF50606_OOCS   	( 0x01  ) 	/* OOC STATUS REGISTER */
#define PCF50606_INT1	 	( 0x02  ) 	/* INT1 CONTROL REGISTER */
#define PCF50606_INT2	 	( 0x03  ) 	/* INT2 CONTROL REGISTER */
#define PCF50606_INT3	 	( 0x04  ) 	/* INT3 CONTROL REGISTER */
#define PCF50606_INT1M	 	( 0x05  ) 	/* INT1 mask CONTROL REGISTER */
#define PCF50606_INT2M	 	( 0x06  ) 	/* INT2 mask CONTROL REGISTER */
#define PCF50606_INT3M	 	( 0x07  ) 	/* INT3 mask CONTROL REGISTER */
#define PCF50606_OOCC1	 	( 0x08  ) 	/* OOC CONTROL 1 REGISTER */
#define PCF50606_OOCC2   	( 0x09  ) 	/* OOC CONTROL 2 REGISTER */
#define PCF50606_RTCSC	 	( 0x0A  ) 	/* REAL TIME CLOCK REGISTER : SECONDS */
#define PCF50606_RTCMN	 	( 0x0B  ) 	/* REAL TIME CLOCK REGISTER : MINUTES */
#define PCF50606_RTCHR	 	( 0x0C  ) 	/* REAL TIME CLOCK REGISTER : HOURS */
#define PCF50606_RTCWD	 	( 0x0D  ) 	/* REAL TIME CLOCK REGISTER : WEEK DAYS */
#define PCF50606_RTCDT	 	( 0x0E  ) 	/* REAL TIME CLOCK REGISTER : DATE */
#define PCF50606_RTCMT	 	( 0x0F  ) 	/* REAL TIME CLOCK REGISTER : MONTH */
#define PCF50606_RTCYR	 	( 0x10  ) 	/* REAL TIME CLOCK REGISTER : YEAR */
#define PCF50606_RTCSCA	 	( 0x11  ) 	/* REAL TIME CLOCK ALARM REGISTER : SECONDS */
#define PCF50606_RTCMNA	 	( 0x12  ) 	/* REAL TIME CLOCK ALARM REGISTER : MINUTES */
#define PCF50606_RTCHRA	 	( 0x13  ) 	/* REAL TIME CLOCK ALARM REGISTER : HOURS */
#define PCF50606_RTCWDA	 	( 0x14  ) 	/* REAL TIME CLOCK ALARM REGISTER : WEEK DAYS */
#define PCF50606_RTCDTA	 	( 0x15  ) 	/* REAL TIME CLOCK ALARM REGISTER : DATE */
#define PCF50606_RTCMTA	 	( 0x16  ) 	/* REAL TIME CLOCK ALARM REGISTER : MONTH */
#define PCF50606_RTCYRA	 	( 0x17  ) 	/* REAL TIME CLOCK ALARM REGISTER : YEAR */
#define PCF50606_PSSC	  	( 0x18  )
#define PCF50606_PWROKM	 	( 0x19  )
#define PCF50606_PWROKS	 	( 0x1A  )
#define PCF50606_DCDC1	 	( 0x1B  )
#define PCF50606_DCDC2	 	( 0x1C  )
#define PCF50606_DCDC3	 	( 0x1D  )
#define PCF50606_DCDC4	 	( 0x1E  )
#define PCF50606_DCDEC1	 	( 0x1F  )
#define PCF50606_DCDEC2	 	( 0x20  )
#define PCF50606_DCUDC1	 	( 0x21  )
#define PCF50606_DCUDC2	 	( 0x22  )
#define PCF50606_IOREGC	 	( 0x23  )
#define PCF50606_D1REGC1	( 0x24  )
#define PCF50606_D2REGC1	( 0x25  )
#define PCF50606_D3REGC1	( 0x26  )
#define PCF50606_LPREGC1	( 0x27  )
#define PCF50606_LPREGC2	( 0x28  )
#define PCF50606_MBCC1	 	( 0x29  )
#define PCF50606_MBCC2	 	( 0x2A  )
#define PCF50606_MBCC3	 	( 0x2B  )
#define PCF50606_MBCS1	 	( 0x2C  )
#define PCF50606_BBCC	 	( 0x2D  )
#define PCF50606_ADCC1	 	( 0x2E  )
#define PCF50606_ADCC2	 	( 0x2F  )
#define PCF50606_ADCS1	 	( 0x30  )
#define PCF50606_ADCS2	 	( 0x31  )
#define PCF50606_ADCS3	 	( 0x32  )
#define PCF50606_ACDC1	 	( 0x33  )
#define PCF50606_BVMC	 	( 0x34  ) 	/* BATTERY VOLTAGE MONITOR CONTROL REGISTER */
#define PCF50606_PWMC1 		( 0x35  )
#define PCF50606_LEDC1 		( 0x36  )
#define PCF50606_LEDC2 		( 0x37  )
#define PCF50606_GPOC1 		( 0x38  )
#define PCF50606_GPOC2 		( 0x39  )
#define PCF50606_GPOC3 		( 0x3A  )
#define PCF50606_GPOC4 		( 0x3B  )
#define PCF50606_GPOC5 		( 0x3C  )


#define	ZEROS	0

/**********************************************************************/
/* OPMOD */
#define PMIC_OPMOD0   ZEROS
#define PMIC_OPMOD1   (               BIT5  )
#define PMIC_OPMOD2   (        BIT6         )
#define PMIC_OPMOD3   (        BIT6 | BIT5  )
#define PMIC_OPMOD4   ( BIT7                )
#define PMIC_OPMOD5   ( BIT7        | BIT5  )
#define PMIC_OPMOD6   ( BIT7 | BIT6         )
#define PMIC_OPMOD7   ( BIT7 | BIT6 | BIT5  )


/**********************************************************************/
/* D1REG,D2REG,D3REG,LPREG Vout */
#define PMIC_REG_LDO_09		0x00
#define PMIC_REG_LDO_10     	0x01
#define PMIC_REG_LDO_11     	0x02
#define PMIC_REG_LDO_12     	0x03
#define PMIC_REG_LDO_13  	0x04
#define PMIC_REG_LDO_14     	0x05
#define PMIC_REG_LDO_15     	0x06
#define PMIC_REG_LDO_16		0x07
#define PMIC_REG_LDO_17     	0x08
#define PMIC_REG_LDO_18     	0x09
#define PMIC_REG_LDO_19		0x0A
#define PMIC_REG_LDO_20     	0x0B
#define PMIC_REG_LDO_21		0x0C
#define PMIC_REG_LDO_22		0x0D
#define PMIC_REG_LDO_23		0x0E
#define PMIC_REG_LDO_24		0x0F
#define PMIC_REG_LDO_25		0x10
#define PMIC_REG_LDO_26		0x11
#define PMIC_REG_LDO_27		0x12
#define PMIC_REG_LDO_28		0x13
#define PMIC_REG_LDO_29		0x14
#define PMIC_REG_LDO_30		0x15
#define PMIC_REG_LDO_31		0x16
#define PMIC_REG_LDO_32		0x17
#define PMIC_REG_LDO_33		0x18


/**********************************************************************/
/* DCD Vout */
#define PMIC_REG_DCD_0900     	0x00
#define PMIC_REG_DCD_0925     	0x01
#define PMIC_REG_DCD_0950     	0x02
#define PMIC_REG_DCD_0975     	0x03
#define PMIC_REG_DCD_1000 	0x04
#define PMIC_REG_DCD_1025     	0x05
#define PMIC_REG_DCD_1050     	0x06
#define PMIC_REG_DCD_1075	0x07
#define PMIC_REG_DCD_1100     	0x08
#define PMIC_REG_DCD_1125     	0x09
#define PMIC_REG_DCD_1150	0x0A
#define PMIC_REG_DCD_1175     	0x0B
#define PMIC_REG_DCD_1200	0x0C
#define PMIC_REG_DCD_1225	0x0D
#define PMIC_REG_DCD_1250	0x0E
#define PMIC_REG_DCD_1275	0x0F
#define PMIC_REG_DCD_1300	0x10
#define PMIC_REG_DCD_1325	0x11
#define PMIC_REG_DCD_1350	0x12
#define PMIC_REG_DCD_1375	0x13
#define PMIC_REG_DCD_1400	0x14
#define PMIC_REG_DCD_1425	0x15
#define PMIC_REG_DCD_1450	0x16
#define PMIC_REG_DCD_1475	0x17
#define PMIC_REG_DCD_1500	0x18
#define PMIC_REG_DCD_1800	0x19
#define PMIC_REG_DCD_2100	0x1A
#define PMIC_REG_DCD_2400	0x1B
#define PMIC_REG_DCD_2700	0x1C
#define PMIC_REG_DCD_3000	0x1D
#define PMIC_REG_DCD_3300	0x1E
#define PMIC_REG_DCD_3600	0x1F

/* DCD DVM Mode */
#define PMIC_DCD_DVMMOD_000  ZEROS
#define PMIC_DCD_DVMMOD_001  (             BIT0 )
#define PMIC_DCD_DVMMOD_010  (       BIT1       )
#define PMIC_DCD_DVMMOD_011  (       BIT1 |BIT0 )
#define PMIC_DCD_DVMMOD_100  ( BIT2             )
#define PMIC_DCD_DVMMOD_101  ( BIT2       |BIT0 )
#define PMIC_DCD_DVMMOD_110  ( BIT2 |BIT1       )
#define PMIC_DCD_DVMMOD_111  ( BIT2 |BIT1 |BIT0 )


/**********************************************************************/
/* DCDE Vout */
#define PMIC_REG_DCDE_09     	0x00
#define PMIC_REG_DCDE_12     	0x01
#define PMIC_REG_DCDE_15     	0x02
#define PMIC_REG_DCDE_18     	0x03
#define PMIC_REG_DCDE_21 	0x04
#define PMIC_REG_DCDE_24     	0x05
#define PMIC_REG_DCDE_27     	0x06
#define PMIC_REG_DCDE_30	0x07
#define PMIC_REG_DCDE_33     	0x08


/**********************************************************************/
/* DCUD Vout */
#define PMIC_REG_DCUD_09     	0x00
#define PMIC_REG_DCUD_12     	0x01
#define PMIC_REG_DCUD_15     	0x02
#define PMIC_REG_DCUD_18     	0x03
#define PMIC_REG_DCUD_21  	0x04
#define PMIC_REG_DCUD_24     	0x05
#define PMIC_REG_DCUD_27     	0x06
#define PMIC_REG_DCUD_30	0x07
#define PMIC_REG_DCUD_33     	0x08
#define PMIC_REG_DCUD_40     	0x10
#define PMIC_REG_DCUD_41     	0x11
#define PMIC_REG_DCUD_42     	0x12
#define PMIC_REG_DCUD_43     	0x13
#define PMIC_REG_DCUD_44  	0x14
#define PMIC_REG_DCUD_45     	0x15
#define PMIC_REG_DCUD_46     	0x16
#define PMIC_REG_DCUD_47	0x17
#define PMIC_REG_DCUD_48     	0x18
#define PMIC_REG_DCUD_49     	0x19
#define PMIC_REG_DCUD_50	0x1A
#define PMIC_REG_DCUD_51     	0x1B
#define PMIC_REG_DCUD_52	0x1C
#define PMIC_REG_DCUD_53	0x1D
#define PMIC_REG_DCUD_54	0x1E
#define PMIC_REG_DCUD_55	0x1F


/**********************************************************************/
/* ADC UNIT */

#define ADCC1_TSCMODACT     ( BIT0  )     //TSC mode in Active state: 0---idele mode; 1---interrupt mode
#define ADCC1_TSCMODSTB     ( BIT1  )     //TSC mode in Standby state: 0---idele mode; 1---interrupt mode
#define ADCC1_TRATSET        ( BIT2  )     //ratiometric setting time: 0--10us; 1---100us
#define ADCC1_NTCSWAPE     ( BIT3  )		//enable NTCSW bias: 0---bias off; 1---bias on
#define ADCC1_NTCSWAOFF     ( BIT4  )		//enable NTCSW auto off mode: 0---control by NTCSWAPE ; 1----bias is off when finish convert
#define ADCC1_EXTSYNCBREAK     ( BIT5  )	//0---ADC waiting for ext sync.; 1----Stop waiting for ext sync and reset ADC
#define ADCC1_TSCINT     		( BIT7  )   //0---pen up; 1---pen down

#define ADCSTART     				( BIT0  )     //ADC start

#define ADCMUX_BATVOLT_RES    		ZEROS
#define ADCMUX_BATVOLT_SUB    		(                    BIT1  )
#define ADCMUX_ADCIN1_RES    		(              BIT2        )
#define ADCMUX_ADCIN1_SUB    		(              BIT2 |BIT1  )
#define ADCMUX_BATTEMP    			(        BIT3              )
#define ADCMUX_ADCIN2    			(        BIT3 |      BIT1  )
#define ADCMUX_ADCIN3    			(        BIT3 |BIT2        )
#define ADCMUX_ADCIN3_RATIO    	(        BIT3 |BIT2 |BIT1  )
#define ADCMUX_X    				( BIT4                     )
#define ADCMUX_Y    				( BIT4 |             BIT1  )
#define ADCMUX_P1    				( BIT4 |       BIT2        )
#define ADCMUX_P2    				( BIT4 |       BIT2 |BIT1  )
#define ADCMUX_BATVOLT_ADCIN1    ( BIT4 | BIT3             )
#define ADCMUX_X_Y    				( BIT4 | BIT3 |BIT2         )
#define ADCMUX_P1_P2    			( BIT4 | BIT3 |BIT2 |BIT1  )

#define ADCSYNC_NO        ZEROS
#define ADCSYNC_TXON           (       BIT5 )
#define ADCSYNC_PWREN1        ( BIT6       )
#define ADCSYNC_PWREN2        ( BIT6 | BIT5 )

#define ADCC2_ADCRES_8     ( BIT7  )		//ADC resolution 0----10bit; 1----8bit

#define ADCS2_ADCDAT1L    (  BIT1 |BIT0  )
#define ADCS2_ADCDAT2L    (  BIT3 |BIT2  )

#define ADCS2_ADCRDY    (  BIT7  )     	//0----ADC ongoing 1-----ADC finish

 /**********************************************************************/

 /*----------*/
 /* MBC UNIT */
 /*----------*/
#define MBCC1_CHGAPE  		0x01		//0---stop charge; 1----enable charge
#define MBCC1_AUTOFST  		( BIT1 ) 		//0---auto fast disable; 1--auto fast enable

//charge mode
#define CHGMOD_Qualification  		ZEROS 		//
#define CHGMOD_Precharge 			(             BIT2   )
#define CHGMOD_Trickle				(        BIT3        )
#define CHGMOD_CCCV					(        BIT3 |BIT2  )
#define CHGMOD_NO_CC				(  BIT4              )
#define CHGMOD_NO_CV				(  BIT4 |      BIT2  )
#define CHGMOD_Switch				(  BIT4 |BIT3        )
#define CHGMOD_Idle    				(  BIT4 |BIT3 |BIT2  )

#define MBCC1_DETMOD					//charger removal detection mode
#define MBCC1_WDRST        0x40

//Max charge time
#define WDTIME_NO 			0x00
#define WDTIME_15Min 		0x05
#define WDTIME_30Min 		0x0A
#define WDTIME_45Min 		0x0F
#define WDTIME_60Min 		0x14
#define WDTIME_75Min 		0x19
#define WDTIME_90Min 		0x1E
#define WDTIME_93Min 		0x1F

//charge control voltage
#define VCHGCON_400			0x00
#define VCHGCON_402			0x01
#define VCHGCON_404			0x02
#define VCHGCON_406			0x03
#define VCHGCON_408			0x04
#define VCHGCON_410			0x05
#define VCHGCON_412			0x06
#define VCHGCON_414			0x07
#define VCHGCON_416			0x08
#define VCHGCON_418			0x09
#define VCHGCON_420			0x0A
#define VCHGCON_422			0x0B
#define VCHGCON_424			0x0C
#define VCHGCON_426			0x0D
#define VCHGCON_428			0x0E
#define VCHGCON_500			0x0F

//Current setting in qualify,precharge,trickle mode
#define CURRAT_005I       0x00
#define CURRAT_010I       0x10
#define CURRAT_020I       0x20
#define CURRAT_040I       0x30

#define MBCC3_WDEXP  (BIT6)

//battery voltage state
#define VBATSTAT_LOW			ZEROS
#define VBATSTAT_NORMAL			(        BIT0 )
#define VBATSTAT_HIGH			( BIT1        )
#define VBATSTAT_OVERCHAR		( BIT1 | BIT0 )

//Battery temperature state
#define TBATSTAT_LOWTEMP		ZEROS
#define TBATSTAT_NORTEMP		(        BIT2 )
#define TBATSTAT_HIGHTEMP		( BIT3 | BIT2 )

//Charger voltage state
#define CHGVINSTAT_LOW			ZEROS
#define CHGVINSTAT_NORMAL		(        BIT4 )
#define CHGVINSTAT_HIGH			( BIT5 | BIT4 )

//Charger current state
#define CHGCURSTAT_LOW			ZEROS
#define CHGCURSTAT_NORMAL		(        BIT6 )
#define CHGCURSTAT_HIGH			( BIT7 | BIT6 )


#define PWIDBR		__REG( PWR_BASE_PHYSICAL + PIDBR_OFFSET )
#define PWICR		__REG( PWR_BASE_PHYSICAL + PI2CR_OFFSET )
#define PWISR		__REG( PWR_BASE_PHYSICAL + PISR_OFFSET )
#define PWISAR		__REG( PWR_BASE_PHYSICAL + PISAR_OFFSET )


#define PCF50606_IRQ(x)			x

// in INT1M
#define PCF50606_ONKEYRM_IRQ		PCF50606_IRQ(0)
#define PCF50606_ONKEYFM_IRQ		PCF50606_IRQ(1)
#define PCF50606_ONKEY1SM_IRQ		PCF50606_IRQ(2)
#define PCF50606_EXTONRM_IRQ		PCF50606_IRQ(3)
#define PCF50606_EXTONFM_IRQ		PCF50606_IRQ(4)
// reservid 				PCF50606_IRQ(5)
#define PCF50606_SECONDM_IRQ		PCF50606_IRQ(6)
#define PCF50606_ALARMM_IRQ		    PCF50606_IRQ(7)

// in INT2M
#define PCF50606_CHGINSM_IRQ		PCF50606_IRQ(8)
#define PCF50606_CHGRMM_IRQ		    PCF50606_IRQ(9)
#define PCF50606_FCHGOKM_IRQ		PCF50606_IRQ(10)
#define PCF50606_CHGERRM_IRQ		PCF50606_IRQ(11)
#define PCF50606_CHGFRDYM_IRQ		PCF50606_IRQ(12)
#define PCF50606_CHGPROTM_IRQ		PCF50606_IRQ(13)
#define PCF50606_CHGWD10SM_IRQ		PCF50606_IRQ(14)
#define PCF50606_CHGWDEXPM_IRQ		PCF50606_IRQ(15)

// in INT3M
#define PCF50606_ADCRDYM_IRQ		PCF50606_IRQ(16)
#define PCF50606_ACDINSM_IRQ		PCF50606_IRQ(17)
#define PCF50606_ACDREMM_IRQ		PCF50606_IRQ(18)
#define PCF50606_TSCPRESM_IRQ		PCF50606_IRQ(19)
// reserved				PCF50606_IRQ(20)
// reserved				PCF50606_IRQ(21)
#define PCF50606_LOWBATM_IRQ		PCF50606_IRQ(22)
#define PCF50606_HIGHTMPM_IRQ		PCF50606_IRQ(23)

#define MAX_PCF_INT		24
#define GPIO_PCF50606_INT 8

typedef struct {
    void * Handler;
    void * Arg;
} PCF_IRQ;

#define local_irq_save(x)					\
	({							\
		unsigned long temp;				\
	__asm__ __volatile__(					\
	"mrs	%0, cpsr		@ local_irq_save\n"	\
"	orr	%1, %0, #128\n"					\
"	msr	cpsr_c, %1"					\
	: "=r" (x), "=r" (temp)					\
	:							\
	: "memory");						\
	})

#define local_irq_restore(x)					\
	__asm__ __volatile__(					\
	"msr	cpsr_c, %0		@ local_irq_restore\n"	\
	:							\
	: "r" (x)						\
	: "memory")

#define cli()					\
	({							\
		unsigned long temp;				\
	__asm__ __volatile__(					\
	"mrs	%0, cpsr		@ local_irq_disable\n"	\
"	orr	%0, %0, #128\n"					\
"	msr	cpsr_c, %0"					\
	: "=r" (temp)						\
	:							\
	: "memory");						\
	})

typedef Boolean (*IsrHandler)(void *, Boolean *);
EXTERN_C Boolean Drv_PcfIrqInstall(uint_t PcfIrq, void *Device, void * Handler);
EXTERN_C Boolean Drv_PcfAllChargeIrqInstall(void *Arg, void * Handler);
EXTERN_C char readPCFregister(char address);
EXTERN_C void writePCFregister(char address, char data );
#endif // _PCF50606_H_
